The invention relates to a semiconductor component such as a diode or a transistor having dielectric shielding structures and to a method of producing such a semiconductor component. The shielding structures results in a high blocking capability of the semiconductor component, without significantly reducing the conductivity.
B. J. Baliga, xe2x80x9cModern Power Devicesxe2x80x9d (John Wiley and Sons, 1987, Section 6) describes a unipolar power transistor, which can be switched through the use of MOS structures. When such a transistor is configured for higher blocking capabilities, the resistance rises considerably, above a blocking capability of about 150 V in accordance with a power rule, with the exponent of the maximum blocking voltage being about 2.5 (page 295 of the textbook cited above).
U.S. Pat. No. 5,216,275 1993 discloses this unsuitable profile being avoided by producing column-like structures of the opposite conductivity type a short distance apart in the layer across which the voltage is dropped. This method is highly complex. In addition, it leads to the component having a very high capacitance. In consequence, its advantages are reduced at high switching frequencies ( greater than 100 kHz).
Similar relationships between the switched-on resistance and the conductivity also apply to unipolar rectifiers. The column structure also results in corresponding advantages in components such as these, and the increased capacitance is disadvantageous in a corresponding manner.
Lateral semiconductor components with layers of alternating conductivity have been proposed in an analogous manner in European Patent No. 0 053 854.
B. J. Baliga, xe2x80x9cModern Power Devicesxe2x80x9d (John Wiley and Sons, 1987, Section 3) describes measures with which the edge area of a semiconductor component can be configured such that this edge area is protected against voltage breakdowns, thus ensuring the high blocking capability of the component. xe2x80x9cTechnical Digest 1985 International Electron Devices Meeting, December 1986, Washing DC (IEEE Catalog Number: 85CH2252-5)xe2x80x9d describes, on pages 154-157, a particularly advantageous version of such an edge area which can be easily produced.
It is accordingly an object of the invention to provide semiconductor components which overcome the above-mentioned disadvantages of the heretofore-known components of this general type and which have a low switched-on resistance, which likewise have a high blocking capability but can be produced easily. Furthermore, if configured suitably, the capacitance of these components can be kept lower than is the case with the known solutions. In addition, the edge area of the components is to be protected against voltage breakdowns. A further object of the invention is to provide a method of manufacturing such a semiconductor component.
With the foregoing and other objects in view there is provided, in accordance with the invention, a semiconductor configuration, including:
a semiconductor component including a first layer, a second layer adjacent the first layer, and dish-shaped structures disposed in the first layer, the semiconductor component defining a current flow direction along a movement direction of current-carrying charge carriers;
the second layer being a layer selected from a semiconductor layer or a metal layer forming an electrode for providing an electrical connection; and
the dish-shaped structures being formed of a material selected from an insulating material or a semi-insulating material; and
the dish-shaped structures having respective main surfaces extending substantially perpendicular to the current flow direction.
According to another feature of the invention, the dish-shaped structures are configured as layer sequences of insulating material and semi-insulating material; the dish-shaped structures have outer layers; and at least one of the outer layers is composed of a semi-insulating material.
According to another feature of the invention, the dish-shaped structures are composed of insulating material; and each of the dish-shaped structures has an edge region with an additional layer disposed in the edge region, the additional layer is composed of a material selected from the group consisting of an insulating material and a semi-insulating material.
According to another feature of the invention, the dish-shaped structures have outer surfaces and are formed with depressions distributed regularly or randomly on at least one of the outer surfaces.
According to another feature of the invention, the semiconductor component has a unipolar current guidance, the dish-shaped structures have respective edges bent up with respect to the current flow direction of the current-carrying charge carriers.
According to another feature of the invention, the first layer and the second layer form a rectifying junction; further layers selected from the group consisting of semiconductor layers and metal layers are provided for making contact with the semiconductor component; and the dish-shaped structures are disposed substantially parallel to the rectifying junction.
According to another feature of the invention, the dish-shaped structures have respective edges bent up toward the rectifying junction.
According to another feature of the invention, the dish-shaped structures have respective edges, the edges are provided with a conductivity doping; and the first layer has a given conductivity type, the conductivity doping has a conductivity type opposite the given conductivity type.
According to another feature of the invention, a maximum distance between adjacent ones of the dish-shaped structures is less than a maximum extent of a space-charge zone in the first layer.
According to another feature of the invention, the dish-shaped structures form a cohesive overall structure.
According to another feature of the invention, the cohesive overall structure is formed with openings having a maximum diameter of less than a maximum extent of a space-charge zone in the first layer.
According to another feature of the invention, the semiconductor component has a unipolar current guidance, the dish-shaped structures have respective outer surfaces formed with depressions facing the current flow direction.
According to another feature of the invention, the dish-shaped structures have respective outer surfaces formed with depressions facing the rectifying junction.
According to another feature of the invention, the first layer defines a plurality of planes, the dish-shaped structures are disposed in respective ones of the plurality of planes.
According to another feature of the invention, spaces between respective ones of the dish-shaped structures disposed in a given one of the planes are each provided above further ones of the dish-shaped structures disposed in an adjacent one of the planes such that the spaces are each located above closed regions of the adjacent one of the planes.
According to another feature of the invention, the dish-shaped structures are insulating structures with fixed charges introduced therein, the fixed charges are positive if the first layer conducts electrons, and the fixed charges are negative if the first layer conducts holes.
According to another feature of the invention, each of the dish-shaped structures has a flat layer with an increased conductivity doping provided on at least one side of each of the dish-shaped structures, the flat layer having a conductivity type corresponding to a conductivity type of the first layer.
According to another feature of the invention, the semiconductor component is a unipolar rectifier.
According to another feature of the invention, the semiconductor component is a unipolar rectifier with shielding pn junctions incorporated therein, the shielding pn junctions being merged rectifier-type structures.
According to another feature of the invention, the dish-shaped structures are located underneath the shielding pn junctions.
According to another feature of the invention, the semiconductor component is a vertical field-controlled transistor.
According to another feature of the invention, the semiconductor component has pn junctions formed with curvatures, the dish-shaped structures are disposed underneath the curvatures of the pn junctions where an electrical field strength assumes a highest value when a reverse voltage is applied.
According to another feature of the invention, the semiconductor component has a rectifying junction, the dish-shaped structures are disposed closer to the rectifying junction than required for limiting a semiconductor breakdown field strength.
According to another feature of the invention, the semiconductor component is a vertical, bipolar semiconductor component having an integrated pnp transistor zone sequence with pn junctions, the dish-shaped structures are associated with one of the pn junctions used as a hole emitter.
According to another feature of the invention, the semiconductor component has a p+ emitter and given regions provided between the p+ emitter and the dish-shaped structures such that a carrier life is shortened in the given regions.
According to another feature of the invention, the dish-shaped structures are assigned to respective ones of the pn junctions of the integrated pn transistor.
According to another feature of the invention, shielding structures are introduced from a surface of the semiconductor component and disposed in an edge region of the semiconductor component, the shielding structures have edges bent up toward a rectifying pn junction of the semiconductor component.
According to another feature of the invention, shielding structures are introduced from a surface of the semiconductor component and disposed in an edge region of the semiconductor component, the shielding structures being incorporated obliquely such that the shielding structures form edges bent toward a rectifying pn junction of the semiconductor component
With the objects of the invention in view there is also provided, a method for producing a semiconductor configuration, the method which includes:
forming a layer with a given thickness;
producing, in the layer, one of insulating structures and semi-insulating structures by photochemical masking processes and implantation of ions, the one of insulating structures and semi-insulating structures having respective surfaces extending substantially perpendicular to a current flow direction; and
further building up the layer to a thickness greater than the given thickness by using epitaxy steps subsequent to removing a photo mask.
Another mode of the invention includes forming depressions in a geometric configuration of the one of insulating structures and semi-insulating structures through the use of wet-chemical or dry-chemical etching processes before the implantation; and forming the one of insulating structures and semi-insulating structures with a same masking as used for forming the depressions.
Another mode of the invention includes producing additional semi-insulating layers with a same masking as used for forming the one of insulating structures and semi-insulating structures.
Another mode of the invention includes producing additional layers of increased dopant concentration with a same masking as used for forming the one of insulating structures and semi-insulating structures.
Another mode of the invention includes producing the one of insulating structures and semi-insulating structures by implanting one of oxygen and nitrogen.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a semiconductor component having dielectric or semi-insulating shielding structures and a method of producing it, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.